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  4. Cantaro sim -quabala !

Cantaro sim -quabala !

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  • G Offline
    G Offline
    Georg Haan
    wrote on last edited by
    #1

    ... doesn't mean anything, but it made you look... Hello! I'd like a guru to take a look at this: if I use a pragma pack on a STRUCT like this: #pragma pack(1) // aligment of 1 byte(was 4) struct CODE {   unsigned char cType;   union   {     DWORD iValue;     FARPROC lpAdress;     unsigned char * lpString;   }; }; #pragma pack(4) // aligment of 4 bytes I will save out the 3 bytes never used with data alignment of 4 bytes, but does this slow down handling the struct? ( or "Where's the catch?" or "Why isn't everything aligned 1 byte?") Thank You ! Georg Haan (.NL)

    RaviBeeR 1 Reply Last reply
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    • G Georg Haan

      ... doesn't mean anything, but it made you look... Hello! I'd like a guru to take a look at this: if I use a pragma pack on a STRUCT like this: #pragma pack(1) // aligment of 1 byte(was 4) struct CODE {   unsigned char cType;   union   {     DWORD iValue;     FARPROC lpAdress;     unsigned char * lpString;   }; }; #pragma pack(4) // aligment of 4 bytes I will save out the 3 bytes never used with data alignment of 4 bytes, but does this slow down handling the struct? ( or "Where's the catch?" or "Why isn't everything aligned 1 byte?") Thank You ! Georg Haan (.NL)

      RaviBeeR Offline
      RaviBeeR Offline
      RaviBee
      wrote on last edited by
      #2

      Georg Haan wrote: but does this slow down handling the struct? ( or "Where's the catch?" or "Why isn't everything aligned 1 byte?") Yes, in a big way. I believe most current processor instructions expect 4, 8, 16 or 64 byte alignment. In a world where memory is cheap (or at least cheaper than speed), you should use the default alignment the compiler selects for the appropriate build target. /ravi "There is always one more bug..." http://www.ravib.com ravib@ravib.com

      G 1 Reply Last reply
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      • RaviBeeR RaviBee

        Georg Haan wrote: but does this slow down handling the struct? ( or "Where's the catch?" or "Why isn't everything aligned 1 byte?") Yes, in a big way. I believe most current processor instructions expect 4, 8, 16 or 64 byte alignment. In a world where memory is cheap (or at least cheaper than speed), you should use the default alignment the compiler selects for the appropriate build target. /ravi "There is always one more bug..." http://www.ravib.com ravib@ravib.com

        G Offline
        G Offline
        Georg Haan
        wrote on last edited by
        #3

        Don't ask me why, but with my code, I'm somethimes searching for a CODE with ctype = 6 and iValue = 4, with bytealignment = 1 I can do a while((*(short*) &Ops[p02++].cType)!=(short)((0x100*OPSEP)+4)) where Ops is a CODE array, p02 a counter and OPSEP = #define OPSEP 6 Hmz, Maybe if I add another bogus short and char in front of the ctype... Comments? Thanks. Georg Haan (.NL)

        RaviBeeR 1 Reply Last reply
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        • G Georg Haan

          Don't ask me why, but with my code, I'm somethimes searching for a CODE with ctype = 6 and iValue = 4, with bytealignment = 1 I can do a while((*(short*) &Ops[p02++].cType)!=(short)((0x100*OPSEP)+4)) where Ops is a CODE array, p02 a counter and OPSEP = #define OPSEP 6 Hmz, Maybe if I add another bogus short and char in front of the ctype... Comments? Thanks. Georg Haan (.NL)

          RaviBeeR Offline
          RaviBeeR Offline
          RaviBee
          wrote on last edited by
          #4

          Relying on byte alignment is dangerous and makes for hard to maintain code. /ravi "There is always one more bug..." http://www.ravib.com ravib@ravib.com

          G 1 Reply Last reply
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          • RaviBeeR RaviBee

            Relying on byte alignment is dangerous and makes for hard to maintain code. /ravi "There is always one more bug..." http://www.ravib.com ravib@ravib.com

            G Offline
            G Offline
            Georg Haan
            wrote on last edited by
            #5

            &;

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