PCI Express and Memory mapped I/O!
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Hi, I'm working with a PCI Express device. I'm planning to let it "DMA" (bus master) write the memory. I'm using a memaccess library from entechtaiwan. This lets me peek and poke memory addresses. When i peek, a pci request read sequence is initiated, when i poke a pci request write sequence is initiated. Can anyone help me with the following things: - when i peek a shared memory address, a pci express sequence is initiated. very nice, but what if The Device has "DMA"ed the memory space, and i just want to know the values? - and the other way around. How to write this shared memory for the PCI bus master to "DMA" read it's values, without the pci express sequence to be initiated? any ideas, sugestions or laughter would be appriciated... I'd like to understand the matter, before spending a lot of time on it and then discover i can start over again.. Thanks in advance, Arjan van Heusden.
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Hi, I'm working with a PCI Express device. I'm planning to let it "DMA" (bus master) write the memory. I'm using a memaccess library from entechtaiwan. This lets me peek and poke memory addresses. When i peek, a pci request read sequence is initiated, when i poke a pci request write sequence is initiated. Can anyone help me with the following things: - when i peek a shared memory address, a pci express sequence is initiated. very nice, but what if The Device has "DMA"ed the memory space, and i just want to know the values? - and the other way around. How to write this shared memory for the PCI bus master to "DMA" read it's values, without the pci express sequence to be initiated? any ideas, sugestions or laughter would be appriciated... I'd like to understand the matter, before spending a lot of time on it and then discover i can start over again.. Thanks in advance, Arjan van Heusden.
DMA is the ability for the device to take control of the system's memory bus (become the 'bus master') and write directly to system memory locations without the need for software running on the system's host processor. This is really a logical 'bus' concept dating from the time when everything was directly connected to the (single) processor's address and data bus pins. Normally the processor was 'bus master' - it emitted the necessary voltages to drive the address and data buses. For another device to write to or read from the system memory (or any other device connected to the memory buses), a Direct Memory Access [DMA], it had to ask the processor to put its bus drivers into high-impedance mode, so that it was not interfering, electrically, with the buses. When finished, the device then relinquishes its master status. On a modern system there are many, many different buses which run at different speeds and have different electrical characteristics. To cross between these different buses, there are different bus controllers. On Intel processor-based systems, the key one for PCI Express operations is the Memory Controller Hub, which connects the processors' Front Side Bus to the memory buses (now normally two), the PCI Express channels, and the Inter-Hub Transport which connects to the I/O Controller Hub (on Intel chipsets). On AMD processor-based systems, the memory buses connect directly to the processor, while the PCI Express channels are connected to a PCI Express controller which connects to the processor(s) over a HyperTransport link. Any operations that involve reading from or writing to a PCI Express device will need a PCI Express read or write sequence, whether driven by the processor or by the device itself. The PCI Express transaction is the read or write operation. To get the results of a DMA write operation (i.e. the device writes to memory), you simply need to read from the physical memory addresses that the DMA operation wrote to. Conversely, to control a DMA read operation, you need to write the data to be transferred to a particular physical memory location (or locations), and program the device to perform the DMA from those locations. Actually, you can normally program the device to transfer the data from locations that already contain the correct data.
Stability. What an interesting concept. -- Chris Maunder