Vectrex
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At the time, I was fascinated by the 9900 chip (the CPU, not the 9918 graphics chip), having all 'registers' in memory. At an interrupt, you could swap context completely simply update the "Workspace Pointer" to another complete register set. The bad thing was of course that register operations were no faster than memory operations, so all things considered, the chip was terribly slow. But interrupt handling was terribly fast! Sometimes, when I dig up memories of those quite different solutions that were ditched, I can't help but wondering: What if someone took up the ideas today and modernized them? A 9900 model 2022 would of course be a 32 or 64 bit chip, and I assume it would be built with a caching mechanism for the register blocks. Maybe, for some application areas were super fast interrupt handling was essential, and "unlimited" number of threads was a valuable property, that idea of just setting a pointer to the appropriate register block might have some merit! (I have worked on a machine with something resembling it: Interrupts were prioritized into 16 levels; a high level could suspend a lower one. Each level had its own physical register set. The first instruction of the interrupt handler started executing 900 ns after the arrival of the interrupt signal, which was rather impressive in the mid 1970s, when these small 16 bit minis (PDP-11 class) where developed and sold.)
I also had a fascination with the TI 9900 chip. Loved that register concept. I don't collect vintage computers, but I have my TI99/4A in it's original box, with some of the original paperwork, and many cassettes of old basic and assembler programs. I haven't turned it on for 20 years. I think I tossed my TI cassette player, but I still have it's box. So, no collecting vintage hardware, but one piece that I can't seem to let go.