You know, I never read hitchhikers guide, but now I'm sure I won't ;-) (j/k) Seriously, this pbits thing is either a really bad idea or it was misreported. Oh I can understand how shrinking the logic for a gate and using weaker bias voltages or currents can sacrifice reliability for power in a single gate, but surely you get a much better reliability/power ratio simply by reducing the number of data bits. The vast majortity of logic on a chip handles data, and the area it takes up is proportional to the data width, and likewise power. Said another way: When we ask the question, "which gates can have their reliability reduced and by how much?", the answer is, "the gates handling the least significant data bits should have their reliability completely removed so that more significant gates all get full reliability". that is, remove the least significant bits.